Digital Physical Design Engineer (P&R)

Responsibilities

Physical design of digital integrated circuits (place & route) following the internal design rules and quality regulations. Assumes full responsibility on the quality and accurateness of the back-end layouts.

  • In close cooperation with analog layouters, digital designers and project leaders
  • Organization of deliverables and timings of these deliverables to ensure high-quality and timely delivery of the digital and mixed-signal top-level layout
  • Assembly of ASICs containing digital and analog parts, taking into account DFT
  • Physical verification: LVS, DRC, ERC, antenna, IR drop, electro migration...
  • Setup and maintain technology setup and tool flow for place & route and physical synthesis


Competences

  • You are a dynamic and highly motivated engineer with at least 3 years of experience in digital physical design, floor planning and P&R for multiple power-domains (UPF) and multiple clock-domains.
  • You use a script-based approach (TCL) to streamline the back-end flow.
  • You have experience with digital synthesis, logic equivalence checking, Static Timing Analysis and physical verification.
  • You are fluent in English, both written and spoken.

Considered as a plus

  • Experience with DFT, BIST and ATPG (TetraMax).
  • Experience with library characterisation tools (e.g. Liberate).
  • Experience with front-end RTL design in VHDL and/or Verilog and/or SystemVerilog.
  • Experience with front-end verification, preferably in SystemVerilog + UVM.
  • Experience with scripting and programming languages such as Python and C.


Our offer

  • An attractive salary package with a variety of extra benefits.
  • A stimulating and pleasant working environment with regular team activities.
  • A financial healthy company with growth potential.
  • Possibility to continuous learn and grow through in-house and external trainings.


Interested? Don’t hesitate and send your cv and letter to jobs@icsense.com